Taiwan-Japan Workshop "Nano Devices"

発表資料一覧
Program	Taiwan-Japan Workshop "Nano Devices"
岩井　洋	High-k Gate Dielectrics for Future III-V FET
舘　喜一	Characterization of carrier transport in vertically-stacked Si nanowire FETs
佐藤　創志	Influence of the cross-sectional shapes for Si Nanowire FETs
川那子　高暢	An Effective Process for Oxygen Defects Suppression for La-based Oxide Gate Dielectric
Maimaitirexiati Maimaiti	Remote-surface-roughness scattering-limited electron mobility in ultrathin high-k gate stacked MOSFETs
Abudukelimu Abudureheman	Influence of Phonon Generation of Hot Electrons in Drain Region on Ballistic Transport
幸田　みゆき	Preparation and electrical characterization of CeO2 films for gate dielectrics application: comparative study of CVD and ALD processes
李　映勲	Corner Effects on Phonon‐Limited Mobility in Rectangular Si Nanowire MOSFETs
Dariush Hassan Zadeh	Effects of surface treatment on electric properties of W/high-k/In0.53Ga0.47As capacitors
小柳　友常	Flatband Voltage Shift of La-based Gate Oxides with Alkali-earth-elements Incorporation
小澤　健児	Self-limited growth of La oxides with ALD
茂森　直登	An effective suppression process for Ni silicide enchroachment into Si nanowire
Dou Chunmeng	Feasibility study of Ce oxide for resistive RAM application
呉　研	Observation of Tunneling FET operation in MOSFET with NiSi/Si Schottky source/channel interface
金田　翼	Effect of Rare Earth Oxide Capping for La-based Gate Oxides
小山　将央	Lateral encroachment of Ni silicide into Si nanowire
来山　大祐	Precise Control of Silicate Reaction with La2O3 Gate Dielectrics for EOT of 0.5 nm
中島　一裕	Interface State Density Measurement of Three Dimensional Silicon Structures by Charge Pumping Method
久保田　透	Estimation of Interface and Oxide Defects in Direct Contact High-k/Si Structure by Conductance Method